Road vehicles — Local Interconnect Network (LIN) — Part 4: Electrical physical layer (EPL) specification 12 V/24 V

ISO 17987-4:2016 specifies the 12 V and 24 V electrical physical layers (EPL) of the LIN communications system. The electrical physical layer for LIN is designed for low-cost networks with bit rates up to 20 kbit/s to connect automotive electronic control units (ECUs). The medium that is used is a single wire for each receiver and transmitter with reference to ground. ISO 17987-4:2016 includes the definition of electrical characteristics of the transmission itself and also the documentation of basic functionality for bus driver devices. All parameters in this document are defined for the ambient temperature range from −40 °C to 125 °C.

Véhicules routiers — Réseau Internet local (LIN) — Partie 4: Spécification de la couche électrique physique (EPL) 12V/24V

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Status
Published
Publication Date
24-Aug-2016
Current Stage
9599 - Withdrawal of International Standard
Start Date
04-Jun-2025
Completion Date
13-Dec-2025
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ISO 17987-4:2016 - Road vehicles -- Local Interconnect Network (LIN)
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DRAFT INTERNATIONAL STANDARD
ISO/DIS 17987-4.2
ISO/TC 22/SC 31 Secretariat: DIN
Voting begins on: Voting terminates on:
2015-10-05 2015-12-05
Road vehicles — Local Interconnect Network (LIN) —
Part 4:
Electrical Physical Layer (EPL) specification 12V/24V
Véhicules routiers — Réseau Internet local (LIN) —
Partie 4: Spécification de la couche électrique physique (EPL) 12V/24V
ICS: 43.040.15
THIS DOCUMENT IS A DRAFT CIRCULATED
FOR COMMENT AND APPROVAL. IT IS
THEREFORE SUBJECT TO CHANGE AND MAY
NOT BE REFERRED TO AS AN INTERNATIONAL
STANDARD UNTIL PUBLISHED AS SUCH.
IN ADDITION TO THEIR EVALUATION AS
BEING ACCEPTABLE FOR INDUSTRIAL,
TECHNOLOGICAL, COMMERCIAL AND
USER PURPOSES, DRAFT INTERNATIONAL
STANDARDS MAY ON OCCASION HAVE TO
BE CONSIDERED IN THE LIGHT OF THEIR
POTENTIAL TO BECOME STANDARDS TO
WHICH REFERENCE MAY BE MADE IN
Reference number
NATIONAL REGULATIONS.
ISO/DIS 17987-4.2:2015(E)
RECIPIENTS OF THIS DRAFT ARE INVITED
TO SUBMIT, WITH THEIR COMMENTS,
NOTIFICATION OF ANY RELEVANT PATENT
RIGHTS OF WHICH THEY ARE AWARE AND TO
©
PROVIDE SUPPORTING DOCUMENTATION. ISO 2015

ISO/DIS 17987-4.2:2015(E)
© ISO 2015, Published in Switzerland
All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized otherwise in any form
or by any means, electronic or mechanical, including photocopying, or posting on the internet or an intranet, without prior
written permission. Permission can be requested from either ISO at the address below or ISO’s member body in the country of
the requester.
ISO copyright office
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Tel. +41 22 749 01 11
Fax +41 22 749 09 47
copyright@iso.org
www.iso.org
ii © ISO 2015 – All rights reserved

ISO/DIS 17987-4.2
Contents Page
Foreword . iv
Introduction . v
1 Scope . 1
2 Normative references . 1
3 Terms, definitions, symbols and abbreviated terms . 1
3.1 Terms and definitions . 1
3.2 Symbols . 2
3.3 Abbreviated terms . 5
4 Conventions . 6
5 Electrical physical layer requirements . 6
5.1 Bit rate deviation . 6
5.2 Timing requirements . 9
5.3 Line driver/receiver . 11
Annex A (informative) LIN peripheral interface design considerations . 22
A.1 General . 22
A.2 UART requirements . 22
A.3 LIN frame controller requirements . 24
Bibliography . 27

ISO/DIS 17987-4.2
Foreword
ISO (the International Organization for Standardization) is a worldwide federation of national standards bodies
(ISO member bodies). The work of preparing International Standards is normally carried out through ISO
technical committees. Each member body interested in a subject for which a technical committee has been
established has the right to be represented on that committee. International organizations, governmental and
non-governmental, in liaison with ISO, also take part in the work. ISO collaborates closely with the
International Electrotechnical Commission (IEC) on all matters of electrotechnical standardization.
International Standards are drafted in accordance with the rules given in the ISO/IEC Directives, Part 2.
The main task of technical committees is to prepare International Standards. Draft International Standards
adopted by the technical committees are circulated to the member bodies for voting. Publication as an
International Standard requires approval by at least 75 % of the member bodies casting a vote.
Attention is drawn to the possibility that some of the elements of this document may be the subject of patent
rights. ISO shall not be held responsible for identifying any or all such patent rights.
ISO 17987-4 was prepared by Technical Committee ISO/TC 22, Road vehicles, Subcommittee SC 31,
Electrical and electronic equipment.
ISO 17987 consists of the following parts, under the general title Road vehicles — Local Interconnect Network
(LIN):
 Part 1: General information and use case definition
 Part 2: Transport protocol and network layer services
 Part 3: Protocol specification
 Part 4: Electrical Physical Layer (EPL) specification 12 V/24 V
 Part 5: Application Programmers Interface (API)
 Part 6: Protocol conformance test specification
 Part 7: Electrical Physical Layer (EPL) conformance test specification
iv © ISO 2015 – All rights reserved

ISO/DIS 17987-4.2
Introduction
This document set specifies the use cases, the communication protocol and physical layer requirements of an
in-vehicle communication network called "Local Interconnect Network (LIN)".
The LIN protocol as proposed is an automotive focused low speed UART-based network (Universal
Asynchronous Receiver Transmitter). Some of the key characteristics of the LIN protocol are signal based
communication, schedule table based frame transfer, master/slave communication with error detection, node
configuration and diagnostic service transportation.
The LIN protocol is for low cost automotive control applications, for example door module and air condition
systems. It serves as a communication infrastructure for low-speed control applications in vehicles by
providing:
 Signal based communication to exchange information between applications in different nodes;
 Bitrate support from 1 kbit/s to 20 kbit/s;
 Deterministic schedule table based frame communication;
 Network management that wakes up and puts the LIN cluster into sleep state in a controlled manner;
 Status management that provides error handling and error signalling;
 Transport layer that allows large amount of data to be transported (such as diagnostic services);
 Specification of how to handle diagnostic services;
 Electrical physical layer specifications;
 Node description language describing properties of slave nodes;
 Network description file describing behaviour of communication;
 Application programmer's interface;
ISO 17987 is based on the Open Systems Interconnection (OSI) Basic Reference Model as specified in
ISO/IEC 7498-1 which structures communication systems into seven layers.
The OSI model structures data communication into seven layers called (top down) application layer (layer 7),
presentation layer, session layer, transport layer, network layer, data link layer and physical layer (layer 1). A
subset of these layers is used in ISO 17987.
ISO 17987 distinguishes between the services provided by a layer to the layer above it and the protocol used
by the layer to send a message between the peer entities of that layer. The reason for this distinction is to
make the services, especially the application layer services and the transport layer services, reusable also for
other types of networks than LIN. In this way the protocol is hidden from the service user and it is possible to
change the protocol if special system requirements demand it.

ISO/DIS 17987-4.2
This document set provides all documents and references required to support the implementation of the
requirements related to.
 Part 1: General information and use case definitions
This part provides an overview of the document set and structure along with the use case definitions and
a common set of resources (definitions, references) for use by all subsequent parts.
 Part 2:
This part specifies the requirements related to the transport protocol and the network layer requirements
to transport the PDU of a message between LIN nodes.
 Part 3:
This part specifies the requirements for implementations of the LIN protocol on the logical level of
abstraction. Hardware related properties are hidden in the defined constraints.
 Part 4:
This part specifies the requirements for implementations of active hardware components which are
necessary to interconnect the protocol implementation.
 Part 5 (published as a non-normative technical report):
This part specifies the LIN API (Application Programmers Interface) and the node configuration and
identification services. The node configuration and identification services are specified in the API and
define how a slave node is configured and how a slave node uses the identification service.
 Part 6:
This part specifies tests to check the conformance of the LIN protocol implementation according to
ISO 17987-2 and ISO 17987-3. This comprises tests for the data link layer, the network layer and the
transport layer.
 Part 7:
This part specifies tests to check the conformance of the LIN electrical physical layer implementation
(logical level of abstraction) according to ISO 17987-4.

vi © ISO 2015 – All rights reserved

DRAFT INTERNATIONAL STANDARD ISO/DIS 17987-4.2

1 Road vehicles — Local Interconnect Network (LIN) — Part 4:
2 Electrical Physical Layer (EPL) specification 12V/24V
3 1 Scope
4 This part of ISO 17987 specifies the 12 V and 24 V electrical physical layers (EPL) of the LIN communications
5 system.
6 The electrical physical layer for LIN is designed for low cost networks with bit rates up to 20 kbit/s to connect
7 automotive electronic control units (ECUs). The medium that is used is a single wire for each, receiver and
8 transmitter with reference to ground.
9 This part of ISO 17987 includes the definition of electrical characteristics of the transmission itself and also
10 documentation of basic functionality for bus driver devices.
11 All parameters in this specification are defined for the ambient temperature range from -40°C to 125°C.
12 2 Normative references
13 The following referenced documents are indispensable for the application of this document. For dated
14 references, only the edition cited applies. For undated references, the latest edition of the referenced
15 document (including any amendments) applies.
16 ISO 17987 (Part 2, 3, 6 and 7), Road vehicles – Local interconnect network (LIN)
17 3 Terms, definitions, symbols and abbreviated terms
18 3.1 Terms and definitions
19 For the purposes of this document, the following terms and definitions apply.
20 3.1.1
21 BR_Range_20K
22 LIN systems which operate at speeds up to 20 kbit/s
23 3.1.2
24 BR_Range_20K 12 V
25 12 V LIN systems which operate at speeds up to 20 kbit/s
26 3.1.3
27 BR_Range_20K 24 V
28 24 V LIN systems which operate at speeds up to 20 kbit/s
29 3.1.4
30 BR_Range_10K
31 LIN systems which operate at speeds up to 10,417 kbits/s
ISO/DIS 17987-4.2
32 3.1.5
33 BR_Range_10K 12 V
34 12 V LIN systems which operate at speeds up to 10,417 kbits/s
35 3.1.6
36 BR_Range_10K 24 V
37 24 V LIN systems which operate at speeds up to 10,417 kbit/s
38 3.2 Symbols
% percentage
µs microsecond
C' line capacitance
LINE
C total bus capacitance
BUS
C capacitance of master node
MASTER
C RXD capacitance (LIN receiver, RXD capacitive load condition)
RXD
C capacitance of slave node
SLAVE
d²V/dt² second derivative of voltage (Volt² per second²)
di/dt instantaneous rate of current change (amps per second)
D serial internal diode at transceiver IC
ser_int
D serial master diode
ser_master
F master bit rate deviation from nominal bitrate
TOL_RES_MASTER
F master bit rate deviation from nominal bitrate in BR_Range_20K systems
TOL_RES_MASTER_A
F master bit rate deviation from nominal bitrate in BR_Range_10K systems
TOL_RES_MASTER_B
F slave bit rate deviation from nominal bitrate
TOL_RES_SLAVE
F slave bit rate deviation from nominal bitrate in BR_Range_20K systems
TOL_RES_SLAVE_A
F slave bit rate deviation from nominal bitrate in BR_Range_10K systems
TOL_RES_SLAVE_B
F slave node 1 bit rate deviation from nominal bitrate
TOL_RES_SLAVE_1
F slave node 2 bit rate deviation from nominal bitrate
TOL_RES_SLAVE_2
F slave to slave bit rate deviation
TOL_SLAVE_to_SLAVE
F slave node bit rate deviation from master node bit rate after synchronization
TOL_SYNCH
F slave node bit rate deviation from master node bit rate after synchronization in
TOL_SYNCH_A
BR_Range_20K systems
F slave node bit rate deviation from master node bit rate after synchronization in
TOL_SYNCH_B
BR_Range_10K systems
2 © ISO 2015 – All rights reserved

ISO/DIS 17987-4.2
F slave node 1 bit rate deviation from master node bit rate after synchronization
TOL_SYNCH_1
F slave node 2 bit rate deviation from master node bit rate after synchronization
TOL_SYNCH_2
F slave node bit rate deviation from nominal bit rate before synchronization
TOL_UNSYNCH
F slave node bit rate deviation from nominal bit rate before synchronization in
TOL_UNSYNCH_A
BR_Range_20K systems
F slave node bit rate deviation from nominal bit rate before synchronization in
TOL_UNSYNCH_B
BR_Range_10K systems
I current into the ECU bus line
BUS
I current limitation for driver dominant state driver on V = V into ECU bus line
BUS_LIM BUS BAT_max
I current at ECU bus line when V is disconnected
BUS_NO_BAT BAT
I current at ECU bus line when V is disconnected
BUS_NO_GND GND_ECU
I current at ECU bus line when driver off (passive) at dominant LIN bus level
BUS_PAS_dom
I current at ECU bus line when driver off (passive) at recessive LIN bus level
BUS_PAS_rec
GND GND of ECU
Device
KΩ kilo ohm
kbit/s kilo bit per second
LEN total length of LIN bus line
BUS
LIN LIN network
Bus
ms millisecond
nF nano farad
pF pico farad
pF/m pico farad per meter (line capacitance)
R total bus-resistor including all slave and master resistors
BUS
R = R || R || R || to || R
BUS MASTER SLAVE_1 SLAVE_2 SLAVE_N
R master resistor
MASTER
R pull-up resistor
pull_up
R slave resistor
SLAVE
t byte field synchronization time
BFS
t basic bit times
BIT
t earliest bit sample time
EBS
t propagation delay of receiver
rx_pd
ISO/DIS 17987-4.2
t symmetry of receiver propagation delay rsising edgepropagation delay of receiver
rx_sym
t latest bit sample time
LBS
t propagation delay time of receiving node 1 at falling (recessive to dominant ) LIN bus
rx_pdf(1)
edge
t propagation delay time of receiving node 2 at falling (recessive to dominant ) LIN bus
rx_pdf(2)
edge
t propagation delay time of receiving node 1 at rising (dominant to recessive) LIN bus
rx_pdr(1)
edge
t propagation delay time of receiving node 2 at rising (dominant to recessive) LIN bus
rx_pdr(2)
edge
t sample window repetition time
SR
TH max. dominant threshold of receiving node (Volt)
Dom(max)
TH min. dominant threshold of receiving node (Volt)
Dom(min)
TH max. recessive threshold of receiving node (Volt)
Rec(max)
TH min. recessive threshold of receiving node (Volt)
Rec(min)
V voltage
V voltage at the anode of the diode
ANODE
V voltage across the ECU supply connectors
BAT
V voltage across the vehicle battery connectors
BATTERY
V voltage on the LIN bus
BUS
V center point of receiver threshold
BUS_CNT
V receiver recessive voltage
BUS_rec
V voltage at the cathode of the diode
CATHODE
V battery ground voltage
GND_BATTERY
V voltage on the local ECU ground connector with respect to vehicle battery ground
GND_ECU
connector (V )
GND_BATTERY
V receiver hysteresis voltage
HYS
V recessive voltage
Rec
V
SerDiode
voltage drop at the serial diodes
V battery shift
Shift_BAT
V difference between battery shift and GND shift
Shift_Difference
V GND shift
Shift_GND
4 © ISO 2015 – All rights reserved

ISO/DIS 17987-4.2
V voltage at transceiver supply pins
SUP
V voltage which the device is not destroyed; no guarantee of correct operation
SUP_NON_OP
V receiver threshold voltage of the recessive to dominant LIN bus edge
th_dom
V receiver threshold voltage of the dominant to recessive LIN bus edge
th_rec
ΔF / F deviation of node bit rate from the master node bit rate
MASTER
ΔF / F deviation from nominal bit rate
Nom
τ time constant
Ω ohm
40 3.3 Abbreviated terms
AC alternate current
API application programmers interface
ASIC application specific integrated circuit
BFS byte field synchronization
DC direct current
EBS earliest bit sample
EMC electromagnetic compatibility
EMI electromagnetic interference
EPL electrical physical layer
ESD electrostatic discharge
EVT event
GND ground
LBS latest bit sample
Max maximum
Min minimum
OSI open systems interconnection
RC RC time constant τ (τ = C * R )
BUS BUS
RX Rx pin of the transceiver
RXD receive data
ISO/DIS 17987-4.2
SR sample window repetition
TRX transceiver
Tx Tx pin of the transceiver
TXD transmit data
Typ. typical
UART universal asynchronous receiver transmitter
41 4 Conventions
42 ISO 17987 and ISO 14229-7 [8] are based on the conventions specified in the OSI Service Conventions
43 (ISO/IEC 10731) [2] as they apply for physical layer, protocol, network & transport protocol and diagnostic
44 services.
45 5 Electrical physical layer requirements
46 5.1 Bit rate deviation
47 The bit rate deviation of the LIN medium describes the bit rate deviation from a referenced bit rate. It is the
48 sum of the following parameters:
49  Inaccuracy of setting the bit rate (systematic failure due to granularity of the configurable bit rate)
50  Clock deviation over temperature and supply voltage range
51  Clock source stability of the slave node starting from the end of the sync byte field up to the end of the
52 entire LIN frame (last sampled bit) when performing synchronization.
53  Bit time measurement failure of the slave node
54  Clock source stability of the master node starting from the end of the sync byte field up to the end of the
55 entire LIN frame (last transmitted bit)
56 On-chip clock may achieve a frequency deviation of better than ± 14 % with internal calibration. This bit rate
57 deviation better than ± 14 % is sufficient to detect a break field in the message stream. The subsequent bit
58 rate adaptation using the sync byte field ensures the proper reception and transmission of the message. The
59 on-chip oscillator shall allow for accurate bite rate measurement and generation for the remainder of the
60 message frame, taking into account effects of anything, which affects the bit rate, such as temperature and
61 voltage drift during operation.
62 The bit rates on the LIN bus are specified in the range of 1 to 20 kbit/s. The specific bit rate used on a LIN bus
63 is defined as the nominal bit rate F .
Nom
64 In case a non-LIN electrical physical layer (e.g. ISO 11898-1, ISO 11898-2) is used, the bit rate may have to
65 be adjusted.
66 5.1.1 12 V LIN systems: Parameters
67 Table 1 defines the bit rate deviation from nominal bit rate.
6 © ISO 2015 – All rights reserved

ISO/DIS 17987-4.2
68 Table 1 — Bit rate deviation from nominal bit rate
Number Bit rate deviation Name ΔF/F .
Nom
Param 1 Master node (deviation from nominal bit rate) F < ± 0,5 %
TOL_RES_MASTER
Param 2 Slave node without making use of synchronization (deviation from F < ± 1,5 %
TOL_RES_SLAVE
nominal bit rate)
Param 3 Deviation of slave node bit rate from the nominal bit rate before F < ± 14 %
TOL_UNSYNCH
synchronization; relevant for nodes making use of synchronization and
direct break detection.
This parameter is microprocessor based nodes with sync/break detection
that is triggering the auto-bauding processing in software. It insures that
the break is detected.
70 Table 2 defines the slave node bit rate deviation from master node bit rate.
71 Table 2 — Slave node bit rate deviation from master node bit rate
Number Bit rate deviation Name ΔF/F
Master
Param 4 Deviation of slave node bit rate from the master node bit rate after F < ± 2 %
TOL_SYNCH
synchronization; relevant for nodes making use of synchronization; any
slave node shall stay within this deviation for all fields of a frame which
follow the sync byte field.
73 Table 3 defines the bit rate deviation for slave to slave communication.
74 Table 3 — Bit rate deviation for slave to slave communication
Number Bit rate deviation Name ΔF/F
Master
Param 5 For communication between any two nodes (i.e. data stream from one F < ± 2 %
TOL_SLAVE_to_SLAVE
slave to another slave) their bit rate shall not differ by more than
F . The following condition shall be checked for:
TOL_SLAVE_to_SLAVE
a) |F - F | < F
TOL_RES_SLAVE_1 TOL_RES_SLAVE_2 TOL_SLAVE_to_SLAVE
b) |F - F | < F
TOL_SYNCH_1 TOL_SYNCH_2 TOL_SLAVE_to_SLAVE
c) |(F + F ) - F |
TOL_RES_MASTER TOL_SYNCH_1 TOL_RES_SLAVE_2
< F
TOL_SLAVE_to_SLAVE
76 5.1.2 24 V LIN systems: Parameters
77 The required accuracy is dependent on the used bitrate range. See Table 15 and also ISO 17987-2.
78 Table 4 defines the bit rate deviation from nominal bitrate in BR_Range_20K systems.
79 Table 4 — Bit rate deviation from nominal bitrate in BR_Range_20K systems
Number BR_Range_20K bit rate deviation Name ΔF / F
Nom.
Param 39 master node
(deviation from nominal bit rate. The nominal bit rate F is defined F < ± 0,3 %
Nom TOL_RES_MASTER_A
in the LIN description file).
ISO/DIS 17987-4.2
Param 40 slave node without making use of synchronization (deviation from
nominal bit rate)
F < ± 0,3 %
TOL_RES_SLAVE_A
For communication between any two nodes their bit rate shall not
differ by more than ± 0,6 %.
Param 41 deviation of slave node bit rate from the nominal bit rate before
synchronization; relevant for nodes making use of synchronization F < ± 14 %
TOL_UNSYNCH_A
and direct break field detection.
81 Table 5 defines the bit rate deviation for slave nodes from master node in BR_Range_20K systems.
82 Table 5 — Bit rate deviation for slave nodes from master node in BR_Range_20K systems
Number BR_Range_20K bit rate deviation Name ΔF / F
MASTER
Param 42 Deviation of slave node bit rate from the master node bit rate after
synchronization; relevant for nodes making use of
F < ± 0,6 %
TOL_SYNCH_A
synchronization; any slave node shall stay within this deviation for
all fields of a frame which follow the sync byte field.
Param 43 For communication between any two nodes (i.e. data stream from
one slave to another slave) their bit rate shall not differ by more
than F . The following condition shall be checked
TOL_SLAVE_to_SLAVE
for:
a) |F - F | < F
TOL_RES_SLAVE_1 TOL_RES_SLAVE_2 TOL_SLAVE_to_SLAVE F < ± 0,6 %
TOL_SLAVE_to_SLAVE
b) |F - F | < F
TOL_SYNCH_1 TOL_SYNCH_2 TOL_SLAVE_to_SLAVE
c) |(F + F ) - F |
TOL_RES_MASTER_A TOL_SYNCH_1 TOL_RES_SLAVE_2
< F
TOL_SLAVE_to_SLAVE
84 Table 6 defines the Bit rate deviation from nominal bitrate in BR_Range_10K systems.
85 Table 6 — Bit rate deviation from nominal bitrate in BR_Range_10K systems
Number BR_Range_10K bit rate deviation Name ΔF / F
Nom
Param 44 master node
(deviation from nominal bit rate. The nominal bit rate F is F < ± 0,5 %
Nom TOL_RES_MASTER_B
defined in the LDF).
Param 45 slave node without making use of synchronization (deviation from
nominal bit rate)
F < ± 1,5 %
TOL_RES_SLAVE_B
For communication between any two nodes their bit rate shall not
differ by more than ± 2,0%.
Param 46 deviation of slave node bit rate from the nominal bit rate before
synchronization; relevant for nodes making use of synchronization F < ± 14 %
TOL_UNSYNCH_B
and direct break field detection.
87 Table 7 defines the bit rate deviation for slave nodes from master node in BR_Range_10K systems.
8 © ISO 2015 – All rights reserved

ISO/DIS 17987-4.2
88 Table 7 — Bit rate deviation for slave nodes from master node in BR_Range_10K systems
Number BR_Range_10K bit rate deviation Name ΔF / F
MASTER
Param 47 Deviation of slave node bit rate from the master node bit rate after
synchronization; relevant for nodes making use of
F < ± 2,0 %
TOL_SYNCH_B
synchronization; any slave node shall stay within this deviation for
all fields of a frame which follow the sync byte field.
Param 48 For communication between any two nodes (i.e. data stream from
one slave to another slave) their bit rate shall not differ by more
than F . The following condition shall be checked
TOL_SLAVE_to_SLAVE
for:
a) |F - F | < F
TOL_RES_SLAVE_1 TOL_RES_SLAVE_2 TOL_SLAVE_to_SLAVE F < ± 2,0 %
TOL_SLAVE_to_SLAVE
b) |F - F | < F
TOL_SYNCH_1 TOL_SYNCH_2 TOL_SLAVE_to_SLAVE
c) |(F + F ) - F |
TOL_RES_MASTER_B TOL_SYNCH_1 TOL_RES_SLAVE_2
< F
TOL_SLAVE_to_SLAVE
90 5.2 Timing requirements
91 5.2.1 Bit timing
92 If not otherwise stated, all bit times in this document use the bit timing of the master node as a reference.
93 5.2.2 Synchronization procedure
94 The sync byte field consists of the fixed data 55 inside a byte field. The synchronization procedure shall be
95 based on time measurement between falling edges of the pattern. The falling edges are available in distances
96 of 2, 4, 6 and 8 bit times which allows a simple calculation of the basic bit times t .
BIT
97 Figure 1 shows the sync byte field.
Sync byte field
8 t
BIT
2 t 2 t 2 t 2 t
BIT BIT BIT BIT
start stop
2 4
0 1 3
5 6 7
bit bit
100 Figure 1 — Sync byte field
ISO/DIS 17987-4.2
102 5.2.3 Bit sample timing
103 The bits of a byte field shall be sampled according to the following specification. In Figure 2 the bit sample
104 timing of a byte field is illustrated. The corresponding timing parameters are listed in Table 8.
105 A byte field shall be synchronized at the falling edge of the start bit. The byte field synchronization (BFS) shall
106 have an accuracy of t .
BFS
107 All methods for start bit sampling that meet the byte field synchronization t are allowed.
BFS
108 After the byte field synchronization on the falling edge of the start bit the data bit itself shall be sampled within
109 the window between the earliest bit sample (EBS) time t and the latest bit sample (LBS) time t . The
EBS LBS
110 latest bit sample time t depends on the accuracy of the byte field synchronization t . The dependency
LBS BFS
111 between t and t is given in equation (1)
LBS BFS
Definition of equation (1)
t = 10/16 t - t
LBS BIT BFS
113 The following bits shall be sampled within the same range as the sample window of the first data bit with the
114 sample window repetition time t respectively. The sample window repetition time t is specified from the
SR SR
115 EBS of the former bit (n-1) to the EBS of the current bit; see equation (2).
Definition of equation (2)
t = t - t = t - t = t
SR EBS(n) EBS(n-1) LBS(n) LBS(n-1) BIT
117 Table 8 — Bit sample timing
Number Parameter Min. Typ. Max. Unit Comment / condition
Param 6 t --- 1/16 2/16 t Value of accuracy of the byte field detection
BFS BIT
Param 7 t 7/16 --- --- t Earliest bit sample time, t ≤ t
EBS BIT EBS LBS
Param 8 t
LBS --- --- --- tBIT Latest bit sample, see equation (1), tLBS ≥ tEBS
119 For devices, which make use of more than one sample per bit, the bit sample majority shall determine the bit
120 data. Furthermore, the sample majority shall be between the EBS and the LBS.
121 Table 9 defines the bit sample timing example.
122 Table 9 — Bit sample timing example
UART/SCI t t t = 10/16 t - t
BFS EBS LBS BIT BFS
cycles per tBIT
16 1/16 t 7/16 t 9/16 t
BIT BIT BIT
8 1/8 t (= 2/16 t ) 4/8 t (= 8/16 t ) 4/8 t (= 8/16 t )
BIT BIT BIT BIT BIT BIT
10 © ISO 2015 – All rights reserved

ISO/DIS 17987-4.2
124 Figure 2 shows the bit sample timing.
Start Bit Bit 0 (LSB)
t
BFS
tEBS = 7/16 tBIT t = t - t = t
SR EBS(1) EBS(0) BIT
t = 10/16 t - t
LBS BIT BFS
Falling edge
EBS LBS
EBS LBS
of start bit
(1) (1)
(0) (0)
detected
Start Stop
Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
bit bit
Bit 7 Stop Bit
t = 7/16 t
EBS BIT
tLBS = 10/16 tBIT - tBFS
t
BIT
127 Figure 2 — Bit sample timing
129 5.3 Line driver/receiver
130 5.3.1 General configuration
131 The bus line driver/receiver is based on the ISO 9141 standard. It consists of the bidirectional bus line LIN
132 which is connected to the driver/receiver of every bus node, and is connected via a termination resistor and a
133 diode to the positive transceiver supply voltage V (see Figure 3). The diode is mandatory to prevent an
SUP
134 uncontrolled power supply of the ECU from the bus in case of a ’loss of battery’.
135 It is important to note that the LIN specification refers to the voltages at the external electrical connections of
136 the electronic control unit (ECU), and not to ECU internal voltages. In particular the parasitic voltage drops of
137 reverse polarity diodes have to be taken into account when designing a LIN transceiver circuit.
138 5.3.2 Definition of supply voltages for the physical interface
139 V denotes the supply voltage at the connector of the ECU. Electronic components within the unit may see
BAT
140 an internal supply V being different from V (see Figure 3). This can be the result of protection filter
SUP BAT
ISO/DIS 17987-4.2
141 elements and dynamic voltage changes on the bus. This has to be taken into consideration for the
142 implementation of semiconductor products for LIN.
V
Shift_BAT
ECU
D
Rev_Batt Transceiver IC
D
ser_int
Master only!
V V
BATTERY
BAT
D
ser_master
V
SUP
R
master
R
Slave
V
V BAT
BATTERY
R
X
LIN, V
BUS
T C , C
Slave Master
X
V
GND_BATTERY V
GND_ECU
V : Internal supply for electronics
SUP
C
Decoupling
V Voltage drop over the
Shift_GND
diodes in pull up path
V
BUS
V
BAT
V
SUP
V
BUSrec
V
BUSdom
t
145 Figure 3 — Illustration of the difference between external supply voltage V and the internal supply
BAT
146 voltage V
SUP
148 5.3.3 Signal specification
149 Figure 4 shows the voltage levels on the bus line.
driver node
receiver node
V V
SUP SUP
recessive recessive
60 %
40 %
dominant dominant
152 Figure 4 — Voltage levels on the bus line
12 © ISO 2015 – All rights reserved

ISO/DIS 17987-4.2
153 For a correct transmission and reception of a bit, it has to be asserted that the signal is available with the
154 correct voltage level (dominant or recessive) at the bit sampling time of the receiver. Ground shifts as well as
155 drops in the supply voltage have to be taken into consideration as well as symmetry failures in the propagation
156 delay. Figure 5 shows the timing parameters that impact the behaviour of the LIN bus. The minimum and
157 maximum values of the different parameters are listed in the following tables.
t t t
BIT BIT BIT
TXD
(input to transmitting node)
t t
BUS_dom(max) BUS_rec(min)
thresholds of
TH
Rec(max)
receiving node 1
V
SUP
TH
Dom(max)
(transceiver supply of
transmitting node)
thresholds of
TH
Rec(min)
receiving node 2
TH
Dom(min)
t t
BUS_dom(min) BUS_rec(max)
RXD
(output of receiving node 1)
t
rx_pdf(1)
t
rx_pdr(1)
RXD
(output of receiving node 2)
t t
rx_pdr(2) rx_pdf(2)
Key
1 LIN bus signal
160 Figure 5 — Definition of bus timing parameters
ISO/DIS 17987-4.2
162 5.3.4 12 V LIN systems: electrical parameters
163 5.3.4.1 DC parameters
164 The electrical DC parameters of the LIN electrical physical layer and the termination resistors are listed in
165 Table 10 and Table 11, respectively. Unless otherwise specified, all voltages are referenced to the local ECU
166 ground and positive currents flow into the ECU.
167 In case of an integrated resistor/diode network no parasitic current paths shall be formed between the bus line
168 and the ECU-internal supply (V ), for example by ESD elements.
SUP
169 Table 10 defines the electrical DC parameters of the LIN electrical physical layer.
170 Table 10 — Electrical DC parameters of the LIN electrical physical layer
Number Parameter Min. Typ. Max. Unit Comment / condition
a
Param 9 8 --- 18 V ECU operating voltage range
V
BAT
b
Param 10 7,0 --- 18 V Supply voltage range
V
SUP
V
Param 11 SUP_NON_OP -0,3 --- 40 V Voltage range within which the device is not
destroyed; no guarantee of correct operation
c
Param 12 40 --- 200 mA Current limitation for driver dominant state
I
BUS_LIM
d
driver on V = V
BUS BAT_max
Param 13 I -1 --- --- mA Input leakage current at the receiver including
BUS_PAS_dom
pull-up resistor as specified in Table 11 Param
26 driver off
V = 0 V
BUS
V = 12 V
BAT
Param 14 I --- --- 20 µA Driver off
BUS_PAS_rec
8 V < V < 18 V
BAT
8 V < V < 18 V
BUS
V ≥ V
BUS BAT
Param 15 I -1 --- 1 mA Control unit disconnected from ground
BUS_NO_GND
GND = V
Device SUP
0 V < V < 18 V
BUS
V = 12 V
BAT
Loss of local ground shall not affect
communication in the residual network.
Param 16 I --- --- 100 µA V disconnected
BUS_NO_BAT BAT
V = GND
SUP
0 < V < 18 V
BUS
Node has to sustain the current that can flow
under this condition. Bus shall remain
operational under this condition.
Param 17 VBUSdom --- --- 0,4 V Receiver dominant state
SUP
Param 18 V 0,6 --- --- V Receiver recessive state
BUSrec SUP
e
V
Param 19 BUS_CNT 0,475 0,5 0,525 V
SUP VBUS_CNT = (Vth_dom + Vth_rec) / 2
Param 20 V --- --- 0,175 V V = V - V
HYS SUP HYS th_rec th_dom
14 © ISO 2015 – All rights reserved

ISO/DIS 17987-4.2
Number Parameter Min. Typ. Max. Unit Comment / condition
Param 21 V 0,4 0,7 1,0 V Voltage drop at the serial diodes
SerDiode
D and D in pull-up path
ser_master Rev_Batt
f
(Figure 3). V = V - V
SerDiode ANODE CATHODE
Param 22 V 0 --- 11,5 % V Battery shift
Shift_BAT BAT
g
V = V - V - V
Shift_BAT BATTERY Shift_GND BAT
Param 23 V 0 --- 11,5 % V GND shift
Shift_GND BAT
g
V = V - V
Shift_GND GND_ECU GND_BATTERY
h
Param 24 0 --- 8 % V Difference between battery shift and GND shift
V BAT
Shift_Difference
V = |V - V |
Shift_Difference Shift_BAT Shift_GND
Param 82 V -27 --- 40 V The part should not suffer any damage
BUS_MAX_RATINGS
a
V denotes the supply voltage at the connector of the control unit and may be different from the internal supply
BAT
V for electronic components (see 5.3.2).
SUP
b
V denotes the supply voltage at the transceiver inside the control unit and may be different from the external
SUP
supply V for control units (see 5.3.2).
BAT
c
I : Current flowing into the node.
BUS
d
A transceiver shall be capable to sink at least 40mA. The maximum current flowing into the node shall not exceed
200 mA under DC conditions to avoid possible damage.
e
V : receiver threshold of the recessive to dominant LIN bus edge. V receiver threshold of the dominant to
th_dom th_rec:
recessive LIN bus edge.
f
V : voltage at the anode of the diode. V : voltage at the cathode of the diode.
ANODE CATHODE
g
V : voltage across the vehicle battery connectors. V : voltage on the local ECU ground connector with
BATTERY GND_ECU
respect to vehicle battery ground connector (V ).
GND_BATTERY
h
This constraint refers to duty cycle D1 and D2 only.
174 Table 11 defines the parameters of the pull-up resistors.
175 Table 11 — Parameters of the pull-up resistors
Number Parameter Min. Typ. Max. Unit Comment / condition
Param 25 R 900 1000 1100 Ω The serial diode is mandatory (see Figure 3).
MASTER
Param 26 R 20 30 60 KΩ The serial diode is mandatory.
SLAVE
177 5.3.4.2 AC parameters
178 The electrical AC parameters of the LIN electrical physical layer are listed in Table 12, Table 13, and
179 Table 14, with the parameters being defined in Figure 5. The electrical AC characteristics of the bus can be
180 strongly affected by the line characteristics as shown in 5.3.3. The time constant τ (and thus the overall
181 capacitance) of the bus (see 5.3.5) has to be selected carefully in order to allow for a correct signal
182 implementation under worst case conditions.
ISO/DIS 17987-4.2
183 Table 12 specifies the timing parameters for proper operation at 20 kbit/s.
184 Table 12 — Driver electrical AC parameters of the LIN electrical physical layer of BR_Range_20K 12 V
185 LIN networks
Number Parameter Min. Typ. Max. Unit Comment / condition
LIN driver, bus load conditions (C ; R ): 1 nF; 1 kΩ / 6,8 nF; 660 Ω / 10 nF; 500 Ω
BUS BUS
Param 27 D1 0,396 --- --- --- TH = 0,744 x V ;
Rec(max) SUP
(Duty Cycle 1)
TH = 0,581 x V ;
Dom(max) SUP
V = 7,0 V to 18 V; t = 50 µs;
SUP BIT
D1 = t / (2 x t )
Bus_rec(min) BIT
Param 28 D2 --- --- 0,581 --- TH = 0,422 x V ;
Rec(min) SUP
(Duty Cycle 2)
TH = 0,284 x V ;
Dom(min) SUP
V = 7,6 V to 18 V; t = 50 µs;
SUP BIT
D2 = t / (2 x t )
Bus_rec(max) BIT
187 For improved EMC performance, exception is granted for speeds of 10,417 kbit/s or below. For details see
188 Table 13, which specifies the timing parameters for proper operation at 10,417 kbit/s.
189 Table 13 — Driver electrical AC parameters of the LIN electrical physical layer of BR_Range_10K 12 V
190 LIN networks
Number Parameter Min. Typ. Max. Unit Comment / condition
LIN driver, bus load conditions (C ; R ): 1 nF; 1 kΩ / 6,8 nF; 660 Ω / 10 nF; 500 Ω
BUS BUS
Param 29 D3 0,417 --- --- --- TH = 0,778 x V
Rec(max) SUP;
(Duty Cycle 3)
TH = 0,616 x V
Dom(max) SUP;
V = 7,0 V to 18 V; t = 96 µs;
SUP BIT
D3 = t / (2 x t )
Bus_rec(min) BIT
Param 30 D4 --- --- 0,590 --- TH = 0,389 x V ;
Rec(min) SUP
(Duty Cycle 4)
TH = 0,251 x V ;
Dom(min) SUP
V = 7,6 V to 18 V; t = 96 µs;
SUP BIT
D4 = t / (2 x t )
Bus_rec(max) BIT
192 Application specific implementations (ASICs) shall meet the parameters in Table 12 and/or Table 13. If both
193 sets of parameters are implemented, the proper mode shall be selected based on the bus bit rate.
194 Table 14 defines the receiver electrical AC parameters of the LIN electrical physical layer.
195 Table 14 — Receiver electrical AC parameters of the LIN electrical physical layer
Number Parameter Min. Typ. Max. Unit Comment / condition
LIN receiver, RXD load condition (C ): 20 pF; (if open drain behaviour: R = 2,4 kΩ)
RXD pull_up
Param 31 trx_pd --- --- 6 µs propagation delay of receiver
Param 32 trx_sym -2 --- 2 µs symmetry of receiver propagation delay rising
edge with respect to falling edge
16 © ISO 2015 – All rights reserved

ISO/DIS 17987-4.2
197 The EMC behaviour of the LIN bus depends on the signal shape represented by slew rate and other factors
198 such as di/dt and d²V/dt². The signal shape should be carefully selected in order to reduce emissions and
199 allow for bit rates up to 20 kbit/s.
200 5.3.5 24V LIN systems: electrical parameters
201 5.3.5.1 DC parameters
202 The electrical DC parameters of the LIN electrical physical layer and the termination resistors are listed in
203 Table 15 and Table 16, respectively. Unless otherwise specified, all voltages are referenced to the local ECU
204 ground and positive currents flow into the ECU.
205 In case of an integrated resistor/diode network no parasitic current paths shall be formed between the bus line
206 and the ECU-internal supply (V ), for example by ESD elements.
SUP
207 Table 15 defines the electrical DC parameters of the LIN electrical physical layer.
208 Table 15 — Electrical DC parameters of the LIN electrical physical layer
Number Parameter Min. Typ. Max. Unit Comment / condition
Param 52 V 16 --- 36 V ECU operating voltage range in
BAT_BR_Range_20K
a
BR_Range_20K 24 V LIN systems
Param 53 V 15 --- 36 V supply voltage range in BR_Range_20K 24 V
SUP_BR_Range_20K
b
LIN systems
V
Param 54 BAT_BR_Range_10K 8 --- 36 V operating voltage range in BR_Range_10K
a
24 V LIN systems
Param 55 V 7 --- 36 V supply voltage range in BR_Range_10K 24 V
SUP_BR_Range_10K
b
LIN systems
Param 56 V -0,3 --- 58 V voltage range within which the device is not
SUP_NON_OP
destroyed; no guarantee of correct operation
c
Param 57 75 --- 300 mA current limitation for driver dominant state
I
BUS_LIM
d
driver on V = V
BUS BAT_max
Param 58 I -2 --- --- mA input leakage current at the receiver including
BUS_PAS_dom
pull-up resistor as specified in Table 16 Param
71 driver off V = 0 V
BUS
V = 24 V
BAT
Param 59 I --- --- 20 µA driver off
BUS_PAS_rec
8 V < V < 36 V
BAT
8 V < V < 36 V
BUS
V ≥ V
BUS BAT
Param 60 I -2 --- 2 mA control unit disconnected from ground
BUS_NO_GND
GND = V
Device SUP
0 V < V < 36 V
BUS
V = 24 V
BAT
loss of local ground shall not affect
communication in the residual network.
Param 61 I --- --- 100 µA V disconnected
BUS_NO_BAT BAT
V = GND
SUP
0 < V < 36 V
BUS
node has to sustain the current that can flow
under this condition. Bus shall remain
operational under this condition.
ISO/DIS 17987-4.2
Param 62 V --- --- 0,4 V receiver dominant state
BUSdom SUP
Param 63 V 0,6 --- --- V receiver recessive state
BUSrec SUP
e
V
Param 64 BUS_CNT 0,475 0,5 0,525 VSUP
V = (V + V ) / 2
BUS_CNT th_dom th_rec
Param 65 V --- --- 0,175 V V = V - V
HYS SUP HYS th_rec th_dom
Param 66 V 0,4 0,7 1,0 V voltage drop at the serial diodes
SerDiode
D and D in pull-up path (Figure 3).
ser_master ser_int
f
V = V - V
SerDiode ANODE CATHODE
V
Param 67 Shift_BAT 0 --- 11,5 % V battery-shift
BAT
g
V = V - V - V
Shift_BAT BATTERY Shift_GND BAT
Param 68 V 0 --- 11,5 % V GND-shift
Shift_GND BAT
g
V = V - V
Shift_GND GND_ECU GND_BATTERY
h
Param 69 0 --- 8 % V difference between battery-shift and GND-shift
BAT
V
Shift_Difference
V = |V - V |
Shift_Difference Shift_BAT Shift_GND
Param 83 V 6 --- 36 V The part should not suffer any damage
BUS_MAX_RATINGS
Number
...


INTERNATIONAL ISO
STANDARD 17987-4
First edition
2016-09-01
Road vehicles — Local Interconnect
Network (LIN) —
Part 4:
Electrical physical layer (EPL)
specification 12 V/24 V
Véhicules routiers — Réseau Internet local (LIN) —
Partie 4: Spécification de la couche électrique physique (EPL) 12V/24V
Reference number
©
ISO 2016
© ISO 2016, Published in Switzerland
All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized otherwise in any form
or by any means, electronic or mechanical, including photocopying, or posting on the internet or an intranet, without prior
written permission. Permission can be requested from either ISO at the address below or ISO’s member body in the country of
the requester.
ISO copyright office
Ch. de Blandonnet 8 • CP 401
CH-1214 Vernier, Geneva, Switzerland
Tel. +41 22 749 01 11
Fax +41 22 749 09 47
copyright@iso.org
www.iso.org
ii © ISO 2016 – All rights reserved

Contents Page
Foreword .iv
Introduction .v
1 Scope . 1
2 Normative references . 1
3 Terms, definitions, symbols and abbreviated terms . 1
3.1 Terms and definitions . 1
3.2 Symbols . 2
3.3 Abbreviated terms . 5
4 Conventions . 6
5 Electrical physical layer requirements . 6
5.1 Bit rate deviation . 6
5.1.1 12 V LIN systems: Parameters . 6
5.1.2 24 V LIN systems: Parameters . 7
5.2 Timing requirements . 9
5.2.1 Bit timing . 9
5.2.2 Synchronization procedure . 9
5.2.3 Bit sample timing . 9
5.3 Line driver/receiver .11
5.3.1 General configuration .11
5.3.2 Definition of supply voltages for the physical interface .11
5.3.3 Signal specification .12
5.3.4 12 V LIN systems: Electrical parameters .13
5.3.5 24 V LIN systems: Electrical parameters .17
5.3.6 Line characteristics .20
5.3.7 12 V LIN systems: performance in non-operation supply voltage range .20
5.3.8 24 V LIN systems: performance in non-operation supply voltage range .21
5.3.9 Performance during fault modes .21
5.3.10 ESD/EMI compliance .21
Annex A (informative) LIN peripheral interface design considerations .22
Bibliography .27
Foreword
ISO (the International Organization for Standardization) is a worldwide federation of national standards
bodies (ISO member bodies). The work of preparing International Standards is normally carried out
through ISO technical committees. Each member body interested in a subject for which a technical
committee has been established has the right to be represented on that committee. International
organizations, governmental and non-governmental, in liaison with ISO, also take part in the work.
ISO collaborates closely with the International Electrotechnical Commission (IEC) on all matters of
electrotechnical standardization.
The procedures used to develop this document and those intended for its further maintenance are
described in the ISO/IEC Directives, Part 1. In particular the different approval criteria needed for the
different types of ISO documents should be noted. This document was drafted in accordance with the
editorial rules of the ISO/IEC Directives, Part 2 (see www.iso.org/directives).
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. ISO shall not be held responsible for identifying any or all such patent rights. Details of
any patent rights identified during the development of the document will be in the Introduction and/or
on the ISO list of patent declarations received (see www.iso.org/patents).
Any trade name used in this document is information given for the convenience of users and does not
constitute an endorsement.
For an explanation on the meaning of ISO specific terms and expressions related to conformity assessment,
as well as information about ISO’s adherence to the World Trade Organization (WTO) principles in the
Technical Barriers to Trade (TBT) see the following URL: www.iso.org/iso/foreword.html.
The committee responsible for this document is ISO/TC 22, Road vehicles, Subcommittee SC 31, Data
communication.
A list of all parts in the ISO 17987 series can be found on the ISO website.
iv © ISO 2016 – All rights reserved

Introduction
ISO 17987 (all parts) specifies the use cases, the communication protocol and physical layer
requirements of an in-vehicle communication network called Local Interconnect Network (LIN).
The LIN protocol as proposed is an automotive focused low speed universal asynchronous receiver
transmitter (UART) based network. Some of the key characteristics of the LIN protocol are signal-
based communication, schedule table based frame transfer, master/slave communication with error
detection, node configuration and diagnostic service transportation.
The LIN protocol is for low-cost automotive control applications, for example, door module and air
condition systems. It serves as a communication infrastructure for low-speed control applications in
vehicles by providing:
— signal-based communication to exchange information between applications in different nodes;
— bit rate support from 1 kbit/s to 20 kbit/s;
— deterministic schedule table-based frame communication;
— network management that wakes up and puts the LIN cluster into sleep state in a controlled manner;
— status management that provides error handling and error signalling;
— transport layer that allows large amount of data to be transported (such as diagnostic services);
— specification of how to handle diagnostic services;
— electrical physical layer specifications;
— node description language describing properties of slave nodes;
— network description file describing behaviour of communication;
— application programmer’s interface.
ISO 17987 (all parts) is based on the open systems interconnection (OSI) Basic Reference Model as
specified in ISO/IEC 7498-1 which structures communication systems into seven layers.
The OSI model structures data communication into seven layers called (top down) application layer
(layer 7), presentation layer, session layer, transport layer, network layer, data link layer and physical layer
(layer 1). A subset of these layers is used in ISO 17987 (all parts).
ISO 17987 (all parts) distinguishes between the services provided by a layer to the layer above it and
the protocol used by the layer to send a message between the peer entities of that layer. The reason for
this distinction is to make the services, especially the application layer services and the transport layer
services, reusable also for other types of networks than LIN. In this way, the protocol is hidden from the
service user and it is possible to change the protocol if special system requirements demand it.
ISO 17987 (all parts) provides all documents and references required to support the implementation of
the requirements related to the following.
— ISO 17987-1: This part provides an overview of the ISO 17987 (all parts) and structure along with
the use case definitions and a common set of resources (definitions, references) for use by all
subsequent parts.
— ISO 17987-2: This part specifies the requirements related to the transport protocol and the network
layer requirements to transport the PDU of a message between LIN nodes.
— ISO 17987-3: This part specifies the requirements for implementations of the LIN protocol on the
logical level of abstraction. Hardware-related properties are hidden in the defined constraints.
— ISO 17987-4: This part specifies the requirements for implementations of active hardware
components which are necessary to interconnect the protocol implementation.
— ISO/TR 17987-5: This part specifies the LIN application programmers interface (API) and the
node configuration and identification services. The node configuration and identification services
are specified in the API and define how a slave node is configured and how a slave node uses the
identification service.
— ISO 17987-6: This part specifies tests to check the conformance of the LIN protocol implementation
according to ISO 17987-2 and ISO 17987-3. This comprises tests for the data link layer, the network
layer and the transport layer.
— ISO 17987-7: This part specifies tests to check the conformance of the LIN electrical physical layer
implementation (logical level of abstraction) according to this document.
vi © ISO 2016 – All rights reserved

INTERNATIONAL STANDARD ISO 17987-4:2016(E)
Road vehicles — Local Interconnect Network (LIN) —
Part 4:
Electrical physical layer (EPL) specification 12 V/24 V
1 Scope
This document specifies the 12 V and 24 V electrical physical layers (EPL) of the LIN communications
system.
The electrical physical layer for LIN is designed for low-cost networks with bit rates up to 20 kbit/s to
connect automotive electronic control units (ECUs). The medium that is used is a single wire for each
receiver and transmitter with reference to ground.
This document includes the definition of electrical characteristics of the transmission itself and also
the documentation of basic functionality for bus driver devices.
All parameters in this document are defined for the ambient temperature range from −40 °C to 125 °C.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any amendments) applies.
IEC 61000-4-2, Electromagnetic compatibility (EMC) — Part 4-2: Testing and measurement techniques —
Electrostatic discharge immunity test
3 Terms, definitions, symbols and abbreviated terms
3.1 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
ISO and IEC maintain terminological databases for use in standardization at the following addresses:
— IEC Electropedia: available at http://www.electropedia.org/
— ISO Online browsing platform: available at http://www.iso.org/obp
3.1.1
BR_Range_20K
LIN systems which operate at speeds up to 20 kbit/s
3.1.2
BR_Range_20K 12 V
12 V LIN systems which operate at speeds up to 20 kbit/s
3.1.3
BR_Range_20K 24 V
24 V LIN systems which operate at speeds up to 20 kbit/s
3.1.4
BR_Range_10K
LIN systems which operate at speeds up to 10 417 kbits/s
3.1.5
BR_Range_10K 12 V
12 V LIN systems which operate at speeds up to 10 417 kbits/s
3.1.6
BR_Range_10K 24 V
24 V LIN systems which operate at speeds up to 10 417 kbit/s
3.2 Symbols
% percentage
µs microsecond
C’ line capacitance
LINE
C total bus capacitance
BUS
C capacitance of master node
MASTER
C RXD capacitance (LIN receiver, RXD capacitive load condition)
RXD
C capacitance of slave node
SLAVE
2 2 2 2
d V/dt second derivative of voltage (Volt per second )
di/dt instantaneous rate of current change (amps per second)
D serial internal diode at transceiver IC
ser_int
D serial master diode
ser_master
F master bit rate deviation from nominal bit rate
TOL_RES_MASTER
F master bit rate deviation from nominal bit rate in BR_Range_20K systems
TOL_RES_MASTER_A
F master bit rate deviation from nominal bit rate in BR_Range_10K systems
TOL_RES_MASTER_B
F slave bit rate deviation from nominal bit rate
TOL_RES_SLAVE
F slave bit rate deviation from nominal bit rate in BR_Range_20K systems
TOL_RES_SLAVE_A
F slave bit rate deviation from nominal bit rate in BR_Range_10K systems
TOL_RES_SLAVE_B
F slave node 1 bit rate deviation from nominal bit rate
TOL_RES_SLAVE_1
F slave node 2 bit rate deviation from nominal bit rate
TOL_RES_SLAVE_2
F slave to slave bit rate deviation
TOL_SLAVE_to_SLAVE
F slave node bit rate deviation from master node bit rate after synchronization
TOL_SYNCH
F slave node bit rate deviation from master node bit rate after synchronization
TOL_SYNCH_A
in BR_Range_20K systems
F slave node bit rate deviation from master node bit rate after synchronization
TOL_SYNCH_B
in BR_Range_10K systems
2 © ISO 2016 – All rights reserved

F slave node 1 bit rate deviation from master node bit rate after synchronization
TOL_SYNCH_1
F slave node 2 bit rate deviation from master node bit rate after synchronization
TOL_SYNCH_2
F slave node bit rate deviation from nominal bit rate before synchronization
TOL_UNSYNCH
F slave node bit rate deviation from nominal bit rate before synchronization in
TOL_UNSYNCH_A
BR_Range_20K systems
F slave node bit rate deviation from nominal bit rate before synchronization in
TOL_UNSYNCH_B
BR_Range_10K systems
I current into the ECU bus line
BUS
I current limitation for driver dominant state driver on V = V into
BUS_LIM BUS BAT_max
ECU bus line
I current at ECU bus line when V is disconnected
BUS_NO_BAT BAT
I current at ECU bus line when V is disconnected
BUS_NO_GND GND_ECU
I current at ECU bus line when driver off (passive) at dominant LIN bus level
BUS_PAS_dom
I current at ECU bus line when driver off (passive) at recessive LIN bus level
BUS_PAS_rec
GND GND of ECU
Device
kΩ kilo ohm
kbit/s kilo bit per second
LEN total length of LIN bus line
BUS
LIN LIN network
Bus
ms millisecond
nF nano farad
pF pico farad
pF/m pico farad per meter (line capacitance)
R total bus-resistor including all slave and master resistors
BUS
R = R ||R ||R || to ||R
BUS MASTER SLAVE_1 SLAVE_2 SLAVE_N
R master resistor
MASTER
R pull-up resistor
pull_up
R slave resistor
SLAVE
t byte field synchronization time
BFS
t basic bit times
BIT
t earliest bit sample time
EBS
t propagation delay of receiver
rx_pd
t symmetry of receiver propagation delay rising edge propagation delay of
rx_sym
receiver
t latest bit sample time
LBS
t propagation delay time of receiving node 1 at falling (recessive to dominant)
rx_pdf(1)
LIN bus edge
t propagation delay time of receiving node 2 at falling (recessive to dominant)
rx_pdf(2)
LIN bus edge
t propagation delay time of receiving node 1 at rising (dominant to recessive)
rx_pdr(1)
LIN bus edge
t propagation delay time of receiving node 2 at rising (dominant to recessive)
rx_pdr(2)
LIN bus edge
t sample window repetition time
SR
TH max. dominant threshold of receiving node (Volt)
Dom(max)
TH min. dominant threshold of receiving node (Volt)
Dom(min)
TH max. recessive threshold of receiving node (Volt)
Rec(max)
TH min. recessive threshold of receiving node (Volt)
Rec(min)
V voltage
V voltage at the anode of the diode
ANODE
V voltage across the ECU supply connectors
BAT
V voltage across the vehicle battery connectors
BATTERY
V voltage on the LIN bus
BUS
V centre point of receiver threshold
BUS_CNT
V receiver recessive voltage
BUS_rec
V voltage at the cathode of the diode
CATHODE
V battery ground voltage
GND_BATTERY
V voltage on the local ECU ground connector with respect to vehicle battery
GND_ECU
ground connector (V )
GND_BATTERY
V receiver hysteresis voltage
HYS
V recessive voltage
Rec
V voltage drop at the serial diodes
SerDiode
V battery shift
Shift_BAT
V difference between battery shift and GND shift
Shift_Difference
V GND shift
Shift_GND
V voltage at transceiver supply pins
SUP
4 © ISO 2016 – All rights reserved

V voltage which the device is not destroyed; no guarantee of correct operation
SUP_NON_OP
V receiver threshold voltage of the recessive to dominant LIN bus edge
th_dom
V receiver threshold voltage of the dominant to recessive LIN bus edge
th_rec
ΔF/F deviation of node bit rate from the master node bit rate
MASTER
ΔF/F deviation from nominal bit rate
Nom
τ time constant
Ω ohm
3.3 Abbreviated terms
AC alternate current
API application programmers interface
ASIC application specific integrated circuit
BFS byte field synchronization
DC direct current
EBS earliest bit sample
ECU electronic control unit
EMC electromagnetic compatibility
EMI electromagnetic interference
EPL electrical physical layer
ESD electrostatic discharge
EVT event
GND ground
LBS latest bit sample
Max. maximum
Min. minimum
OSI open systems interconnection
RC RC time constant τ (τ = C × R )
BUS BUS
RX Rx pin of the transceiver
RXD receive data
SR sample window repetition
TRX transceiver
Tx Tx pin of the transceiver
TXD transmit data
Typ. typical
UART universal asynchronous receiver transmitter
4 Conventions
ISO 17987 (all parts) and ISO 14229-7 are based on the conventions specified in the OSI Service
Conventions (see ISO/IEC 10731) as they apply for physical layer, protocol, network and transport
protocol and diagnostic services.
5 Electrical physical layer requirements
5.1 Bit rate deviation
The bit rate deviation of the LIN medium describes the bit rate deviation from a referenced bit rate. It is
the sum of the following parameters:
— inaccuracy of setting the bit rate (systematic failure due to granularity of the configurable bit rate);
— clock deviation over temperature and supply voltage range;
— clock source stability of the slave node starting from the end of the sync byte field up to the end of
the entire LIN frame (last sampled bit) when performing synchronization;
— bit time measurement failure of the slave node;
— clock source stability of the master node starting from the end of the sync byte field up to the end of
the entire LIN frame (last transmitted bit).
On-chip clock may achieve a frequency deviation of better than ±14 % with internal calibration. This
bit rate deviation better than ±14 % is sufficient to detect a break field in the message stream. The
subsequent bit rate adaptation using the sync byte field ensures the proper reception and transmission
of the message. The on-chip oscillator shall allow for accurate bite rate measurement and generation for
the remainder of the message frame, taking into account effects of anything, which affects the bit rate,
such as temperature and voltage drift during operation.
The bit rates on the LIN bus are specified in the range of 1 kbit/s to 20 kbit/s. The specific bit rate used
on a LIN bus is defined as the nominal bit rate, F .
Nom
In case a non-LIN electrical physical layer (e.g. ISO 11898-1, ISO 11898-2) is used, the bit rate may have
to be adjusted.
5.1.1 12 V LIN systems: Parameters
Table 1 defines the bit rate deviation from nominal bit rate.
6 © ISO 2016 – All rights reserved

Table 1 — Bit rate deviation from nominal bit rate
Number Bit rate deviation Name ΔF/F
Nom
Param 1 Master node (deviation from nominal bit rate) F <±0,5 %
TOL_RES_
MASTER
Param 2 Slave node without making use of synchronization (deviation from F <±1,5 %
TOL_RES_SLAVE
nominal bit rate)
Param 3 Deviation of slave node bit rate from the nominal bit rate before F <±14 %
TOL_UNSYNCH
synchronization; relevant for nodes making use of synchronization
and direct break detection.
This parameter is microprocessor-based nodes with sync/break
detection that is triggering the auto-bauding processing in software.
It insures that the break is detected.
Table 2 defines the slave node bit rate deviation from master node bit rate.
Table 2 — Slave node bit rate deviation from master node bit rate
Number Bit rate deviation Name ΔF/F
MASTER
Param 4 Deviation of slave node bit rate from the master node bit rate after F <±2 %
TOL_SYNCH
synchronization; relevant for nodes making use of synchronization;
any slave node shall stay within this deviation for all fields of a
frame which follow the sync byte field.
Table 3 defines the bit rate deviation for slave to slave communication.
Table 3 — Bit rate deviation for slave to slave communication
Number Bit rate deviation Name ΔF/F
MASTER
Param 5 For communication between any two nodes (i.e. data stream F <±2 %
TOL_SLAVE_to_
from one slave to another slave), their bit rate shall not differ by
SLAVE
more than F . The following condition shall be
TOL_SLAVE_to_SLAVE
checked for:
a) |F − F | < F ;
TOL_RES_SLAVE_1 TOL_RES_SLAVE_2 TOL_SLAVE_to_SLAVE
b) |F − F | < F ;
TOL_SYNCH_1 TOL_SYNCH_2 TOL_SLAVE_to_SLAVE
c) |(F + F ) − F |
TOL_RES_MASTER TOL_SYNCH_1 TOL_RES_SLAVE_2
< F .
TOL_SLAVE_to_SLAVE
5.1.2 24 V LIN systems: Parameters
The required accuracy is dependent on the used bit rate range. See Table 15 and also ISO 17987-2.
Table 4 defines the bit rate deviation from nominal bit rate in BR_Range_20K systems.
Table 4 — Bit rate deviation from nominal bit rate in BR_Range_20K systems
Number BR_Range_20K bit rate deviation Name ΔF/F
Nom
Param 39 master node
F
TOL_RES_
(deviation from nominal bit rate. The nominal bit rate F is <±0,3 %
Nom
MASTER_A
defined in the LIN description file).
Param 40 slave node without making use of synchronization (deviation
from nominal bit rate)
F <±0,3 %
TOL_RES_SLAVE_A
For communication between any two nodes, their bit rate shall
not differ by more than ±0,6 %.
Param 41 deviation of slave node bit rate from the nominal bit rate before
synchronization; relevant for nodes making use of F <±14 %
TOL_UNSYNCH_A
synchronization and direct break field detection.
Table 5 defines the bit rate deviation for slave nodes from master node in BR_Range_20K systems.
Table 5 — Bit rate deviation for slave nodes from master node in BR_Range_20K systems
Number BR_Range_20K bit rate deviation Name ΔF/F
MASTER
Param 42 Deviation of slave node bit rate from the master node bit rate
after synchronization; relevant for nodes making use of
synchronization; any slave node shall stay within this F <±0,6 %
TOL_SYNCH_A
deviation for all fields of a frame which follow the sync byte
field.
Param 43 For communication between any two nodes (i.e. data stream
from one slave to another slave), their bit rate shall not differ
by more than F . The following condition
TOL_SLAVE_to_SLAVE
shall be checked for:
F
TOL_SLAVE_to_
a) |F − F | < F ; <±0,6 %
TOL_RES_SLAVE_1 TOL_RES_SLAVE_2 TOL_SLAVE_to_SLAVE
SLAVE
b) |F − F | < F ;
TOL_SYNCH_1 TOL_SYNCH_2 TOL_SLAVE_to_SLAVE
c) |(F + F )− F |
TOL_RES_MASTER_A TOL_SYNCH_1 TOL_RES_SLAVE_2
< F .
TOL_SLAVE_to_SLAVE
Table 6 defines the Bit rate deviation from nominal bit rate in BR_Range_10K systems.
Table 6 — Bit rate deviation from nominal bit rate in BR_Range_10K systems
Number BR_Range_10K bit rate deviation Name ΔF/F
Nom
Param 44 master node
F
TOL_RES_
(deviation from nominal bit rate. The nominal bit rate F is <±0,5 %
Nom
MASTER_B
defined in the LDF).
Param 45 slave node without making use of synchronization (deviation
from nominal bit rate)
F <±1,5 %
TOL_RES_SLAVE_B
For communication between any two nodes, their bit rate
shall not differ by more than ±2,0 %.
Param 46 deviation of slave node bit rate from the nominal bit rate
before synchronization; relevant for nodes making use of F <±14 %
TOL_UNSYNCH_B
synchronization and direct break field detection.
Table 7 defines the bit rate deviation for slave nodes from master node in BR_Range_10K systems.
8 © ISO 2016 – All rights reserved

Table 7 — Bit rate deviation for slave nodes from master node in BR_Range_10K systems
Number BR_Range_10K bit rate deviation Name ΔF/F
MASTER
Param 47 Deviation of slave node bit rate from the master node bit
rate after synchronization; relevant for nodes making use of
synchronization; any slave node shall stay within this F <±2,0 %
TOL_SYNCH_B
deviation for all fields of a frame which follow the sync
byte field.
Param 48 For communication between any two nodes (i.e. data stream
from one slave to another slave), their bit rate shall not differ
by more than F . The following condition
TOL_SLAVE_to_SLAVE
shall be checked for:
F
TOL_SLAVE_to_
a) |F − F | < F ; <±2,0 %
TOL_RES_SLAVE_1 TOL_RES_SLAVE_2 TOL_SLAVE_to_SLAVE
SLAVE
b) |F − F | < F :
TOL_SYNCH_1 TOL_SYNCH_2 TOL_SLAVE_to_SLAVE
c) |(F + F ) − F |
TOL_RES_MASTER_B TOL_SYNCH_1 TOL_RES_SLAVE_2
< F .
TOL_SLAVE_to_SLAVE
5.2 Timing requirements
5.2.1 Bit timing
If not otherwise stated, all bit times in this document use the bit timing of the master node as a reference.
5.2.2 Synchronization procedure
The sync byte field consists of the fixed data 55 inside a byte field. The synchronization procedure
shall be based on time measurement between falling edges of the pattern. The falling edges are
available in distances of 2 bit, 4 bit, 6 bit and 8 bit times which allows a simple calculation of the basic
bit times, t .
BIT
Figure 1 shows the sync byte field.
Figure 1 — Sync byte field
5.2.3 Bit sample timing
The bits of a byte field shall be sampled according to the following specification. In Figure 2, the bit
sample timing of a byte field is illustrated. The corresponding timing parameters are listed in Table 8.
A byte field shall be synchronized at the falling edge of the start bit. The byte field synchronization
(BFS) shall have an accuracy of t .
BFS
All methods for start bit sampling that met the byte field synchronization t are allowed.
BFS
After the byte field synchronization on the falling edge of the start bit, the data bit itself shall be sampled
within the window between the earliest bit sample (EBS) time, t , and the latest bit sample (LBS)
EBS
time, t . The latest bit sample time, t , depends on the accuracy of the byte field synchronization,
LBS LBS
t . The dependency between t and t is given in Formula (1):
BFS LBS BFS
t = 10/16 t − t (1)
LBS BIT BFS
The following bits shall be sampled within the same range as the sample window of the first data bit
with the sample window repetition time, t , respectively. The sample window repetition time, t , is
SR SR
specified from the EBS of the former bit (n-1) to the EBS of the current bit; see Formula (2):
t = t − t = t − t = t (2)
SR EBS(n) EBS(n-1) LBS(n) LBS(n-1) BIT
Table 8 — Bit sample timing
Number Parameter Min. Typ. Max. Unit Comment/condition
Param 6 t — 1/16 2/16 t Value of accuracy of the byte field detection
BFS BIT
Param 7 t 7/16 — — t Earliest bit sample time, t ≤ t
EBS BIT EBS LBS
Param 8 t — — — t Latest bit sample [see Formula (1)], t ≥ t
LBS BIT LBS EBS
For devices, which make use of more than one sample per bit, the bit sample majority shall determine
the bit data. Furthermore, the sample majority shall be between the EBS and the LBS.
Table 9 defines the bit sample timing example.
Table 9 — Bit sample timing example
UART/SCI
t t t = 10/16 t − t
BFS EBS LBS BIT BFS
cycles per t
BIT
16 1/16 t 7/16 t 9/16 t
BIT BIT BIT
8 1/8 t (=2/16 t ) 4/8 t (=8/16 t ) 4/8 t (=8/16 t )
BIT BIT BIT BIT BIT BIT
Figure 2 shows the bit sample timing.
10 © ISO 2016 – All rights reserved

Figure 2 — Bit sample timing
5.3 Line driver/receiver
5.3.1 General configuration
The bus line driver/receiver is based on ISO 9141. It consists of the bidirectional bus line LIN which is
connected to the driver/receiver of every bus node, and is connected via a termination resistor and a
diode to the positive transceiver supply voltage, V (see Figure 3). The diode is mandatory to prevent
SUP
an uncontrolled power supply of the ECU from the bus in case of a “loss of battery”.
It is important to note that the LIN specification refers to the voltages at the external electrical
connections of the electronic control unit (ECU), and not to ECU internal voltages. In particular, the
parasitic voltage drops of reverse polarity diodes shall be taken into account when designing a LIN
transceiver circuit.
5.3.2 Definition of supply voltages for the physical interface
V denotes the supply voltage at the connector of the ECU. Electronic components within the unit may
BAT
see an internal supply V being different from V (see Figure 3). This can be the result of protection
SUP BAT
filter elements and dynamic voltage changes on the bus. This shall be taken into consideration for the
implementation of semiconductor products for LIN.
Figure 3 — Illustration of the difference between external supply voltage, V , and the internal
BAT
supply voltage, V
SUP
5.3.3 Signal specification
Figure 4 shows the voltage levels on the bus line.
Figure 4 — Voltage levels on the bus line
12 © ISO 2016 – All rights reserved

For a correct transmission and reception of a bit, it shall be asserted that the signal is available with the
correct voltage level (dominant or recessive) at the bit sampling time of the receiver. Ground shifts as
well as drops in the supply voltage shall be taken into consideration as well as symmetry failures in the
propagation delay. Figure 5 shows the timing parameters that impact the behaviour of the LIN bus. The
minimum and maximum values of the different parameters are listed in the following tables.
Key
1 LIN bus signal
Figure 5 — Definition of bus timing parameters
5.3.4 12 V LIN systems: Electrical parameters
5.3.4.1 DC parameters
The electrical DC parameters of the LIN electrical physical layer and the termination resistors are listed
in Tables 10 and 11, respectively. Unless otherwise specified, all voltages are referenced to the local
ECU ground and positive currents flow into the ECU.
In case of an integrated resistor/diode network, no parasitic current paths shall be formed between the
bus line and the ECU-internal supply (V ), for example by ESD elements.
SUP
Table 10 defines the electrical DC parameters of the LIN electrical physical layer.
Table 10 — Electrical DC parameters of the LIN electrical physical layer
Number Parameter Min. Typ. Max. Unit Comment/condition
a
Param 9 V 8 — 18 V ECU operating voltage range
BAT
b
Param 10 V 7,0 — 18 V Supply voltage range
SUP
Param 11 V −0,3 — 40 V Voltage range within which the device is not
SUP_NON_OP
destroyed; no guarantee of correct operation
c
Param 12 I 40 — 200 mA Current limitation for driver dominant state
BUS_LIM
d
driver on V = V
BUS BAT_max
Param 13 I −1 — — mA Input leakage current at the receiver
BUS_PAS_dom
including pull-up resistor as specified in
Table 11 Param 26 driver off
V = 0 V
BUS
V = 12 V
BAT
Param 14 I — — 20 µA Driver off
BUS_PAS_rec
8 V < V < 18 V
BAT
8 V < V < 18 V
BUS
V ≥ V
BUS BAT
Param 15 I −1 — 1 mA Control unit disconnected from ground
BUS_NO_GND
GND = V
Device SUP
0 V < V < 18 V
BUS
V = 12 V
BAT
Loss of local ground shall not affect
communication in the residual network.
Param 16 I — — 100 µA V disconnected
BUS_NO_BAT BAT
V = GND
SUP
0 < V < 18 V
BUS
Node shall sustain the current that can flow
under this condition. Bus shall remain oper-
ational under this condition.
Param 17 V — — 0,4 V Receiver dominant state
BUSdom SUP
Param 18 V 0,6 — — V Receiver recessive state
BUSrec SUP
e
Param 19 V 0,475 0,5 0,525 V V = (V + V )/2
BUS_CNT SUP BUS_CNT th_dom th_rec
Param 20 V — — 0,175 V V = V − V
HYS SUP HYS th_rec th_dom
a
V denotes the supply voltage at the connector of the control unit and may be different from the internal supply, V ,
BAT SUP
for electronic components (see 5.3.2).
b
V denotes the supply voltage at the transceiver inside the control unit and may be different from the external supply,
SUP
V , for control units (see 5.3.2).
BAT
c
I : current flowing into the node.
BUS
d
A transceiver shall be capable to sink at least 40 mA. The maximum current flowing into the node shall not exceed
200 mA under DC conditions to avoid possible damage.
e
V : receiver threshold of the recessive to dominant LIN bus edge. V : receiver threshold of the dominant to
th_dom th_rec
recessive LIN bus edge.
f
V : voltage at the anode of the diode. V : voltage at the cathode of the diode.
ANODE CATHODE
g
V : voltage across the vehicle battery connectors. V : voltage on the local ECU ground connector with
BATTERY GND_ECU
respect to vehicle battery ground connector (V ).
GND_BATTERY
h
This constraint refers to duty cycle D1 and D2 only.
14 © ISO 2016 – All rights reserved

Table 10 (continued)
Number Parameter Min. Typ. Max. Unit Comment/condition
Param 21 V 0,4 0,7 1,0 V Voltage drop at the serial diodes
SerDiode
D and D in pull-up path
ser_master Rev_Batt
f
(Figure 3). V = V − V
SerDiode ANODE CATHODE
Param 22 V 0 — 11,5 % V Battery shift
Shift_BAT BAT
g
V = V − V − V
Shift_BAT BATTERY Shift_GND BAT
Param 23 V 0 — 11,5 % V GND shift
Shift_GND BAT
g
V = V − V
Shift_GND GND_ECU GND_BATTERY
h
Param 24 V 0 — 8 % V Difference between battery shift and GND
Shift_Difference BAT
shift
V = |V − V |
Shift_Difference Shift_BAT Shift_GND
Param 82 V −27 — 40 V The part should not suffer any damage.
BUS_MAX_
RATINGS
a
V denotes the supply voltage at the connector of the control unit and may be different from the internal supply, V ,
BAT SUP
for electronic components (see 5.3.2).
b
V denotes the supply voltage at the transceiver inside the control unit and may be different from the external supply,
SUP
V , for control units (see 5.3.2).
BAT
c
I : current flowing into the node.
BUS
d
A transceiver shall be capable to sink at least 40 mA. The maximum current flowing into the node shall not exceed
200 mA under DC conditions to avoid possible damage.
e
V : receiver threshold of the recessive to dominant LIN bus edge. V : receiver threshold of the dominant to
th_dom th_rec
recessive LIN bus edge.
f
V : voltage at the anode of the diode. V : voltage at the cathode of the diode.
ANODE CATHODE
g
V : voltage across the vehicle battery connectors. V : voltage on the local ECU ground connector with
BATTERY GND_ECU
respect to vehicle battery ground connector (V ).
GND_BATTERY
h
This constraint refers to duty cycle D1 and D2 only.
Table 11 defines the parameters of the pull-up resistors.
Table 11 — Parameters of the pull-up resistors
Number Parameter Min. Typ. Max. Unit Comment/condition
Param 25 R 900 1 000 1 100 Ω The serial diode is mandatory (see Figure 3).
MASTER
Param 26 R 20 30 60 kΩ The serial diode is mandatory.
SLAVE
5.3.4.2 AC parameters
The electrical AC parameters of the LIN electrical physical layer are listed in Tables 12, 13 and 14, with
the parameters being defined in Figure 5. The electrical AC characteristics of the bus can be strongly
affected by the line characteristics as shown in 5.3.3. The time constant, τ, (and thus the overall
capacitance) of the bus (see 5.3.5) shall be selected carefully in order to allow for a correct signal
implementation under worst case conditions.
Table 12 specifies the timing parameters for proper operation at 20 kbit/s.
Table 12 — Driver electrical AC parameters of the LIN electrical physical layer of BR_Range_20K
12 V LIN networks
Number Parameter Min. Typ. Max. Unit Comment/condition
LIN driver, bus load conditions (C ; R ): 1 nF; 1 kΩ/6,8 nF; 660 Ω/10 nF; 500 Ω
BUS BUS
Param 27 D1 0,396 — — — TH = 0,744 × V ;
Rec(max) SUP
(Duty Cycle 1) TH = 0,581 × V ;
Dom(max) SUP
V = 7,0 V to 18 V; t = 50 µs;
SUP BIT
D1 = t /(2 × t )
Bus_rec(min) BIT
Param 28 D2 — — 0,581 — TH = 0,422 × V ;
Rec(min) SUP
(Duty Cycle 2) TH = 0,284 × V ;
Dom(min) SUP
V = 7,6 V to 18 V; t = 50 µs;
SUP BIT
D2 = t /(2 × t )
Bus_rec(max) BIT
For improved EMC performance, exception is granted for speeds of 10 417 kbit/s or below. For details,
see Table 13, which specifies the timing parameters for proper operation at 10 417 kbit/s.
Table 13 — Driver electrical AC parameters of the LIN electrical physical layer of BR_Range_10K
12 V LIN networks
Number Parameter Min. Typ. Max. Unit Comment/condition
LIN driver, bus load conditions (C ; R ): 1 nF; 1 kΩ/6,8 nF; 660 Ω/10 nF; 500 Ω
BUS BUS
Param 29 D3 0,417 — — — TH = 0,778 × V
Rec(max) SUP;
(Duty Cycle 3) TH = 0,616 × V
Dom(max) SUP;
V = 7,0 V to 18 V; t = 96 µs;
SUP BIT
D3 = t /(2 × t )
Bus_rec(min) BIT
Param 30 D4 — — 0,590 — TH = 0,389 × V ;
Rec(min) SUP
(Duty Cycle 4) TH = 0,251 × V ;
Dom(min) SUP
V = 7,6 V to 18 V; t = 96 µs;
SUP BIT
D4 = t /(2 × t )
Bus_rec(max) BIT
Application specific implementations (ASICs) shall meet the parameters in Table 12 and/or Table 13. If
both sets of parameters are implemented, the proper mode shall be selected based on the bus bit rate.
Table 14 defines the receiver electrical AC parameters of the LIN electrical physical layer.
Table 14 — Receiver electrical AC parameters of the LIN electrical physical layer
Number Parameter Min. Typ. Max. Unit Comment/condition
LIN receiver, RXD load condition (C ): 20 pF; (if open drain behaviour: R = 2,4 kΩ)
RXD pull_up
Param 31 trx_pd — — 6 µs propagation delay of receiver
Param 32 trx_sym −2 — 2 µs symmetry of receiver propagation delay rising
edge with respect to falling edge
The EMC behaviour of the LIN bus depends on the signal shape represented by slew rate and other
2 2
factors such as di/dt and d V/dt . The signal shape should be carefully selected in order to reduce
emissions and allow for bit rates up to 20 kbit/s.
16 © ISO 2016 – All rights reserved

5.3.5 24 V LIN systems: Electrical parameters
5.3.5.1 DC parameters
The electrical DC parameters of the LIN electrical physical layer and the termination resistors are listed
in Tables 15 and 16, respectively. Unless otherwise specified, all voltages are referenced to the local
ECU ground and positive currents flow into the ECU.
In case of an integrated resistor/diode network, no parasitic current paths shall be formed between the
bus line and the ECU-internal supply (V ), for example by ESD elements.
SUP
Table 15 defines the electrical DC parameters of the LIN electrical physical layer.
Table 15 — Electrical DC parameters of the LIN electrical physical layer
Number Parameter Min. Typ. Max. Unit Comment/condition
Param 52 V 16 — 36 V ECU operating voltage range in BR_
BAT_BR_Range_
a
Range_20K 24 V LIN systems
20K
Param 53 V 15 — 36 V supply voltage range in BR_Range_20K 24 V
SUP_BR_
b
LIN systems
Range_20K
Param 54 V 8 — 36 V operating voltage range in BR_Range_10K
BAT_BR_Range_
a
24 V LIN systems
10K
Param 55 V 7 — 36 V supply voltage range in BR_Range_10K 24 V
SUP_BR_
b
LIN systems
Range_10K
Param 56 V −0,3 — 58 V voltage range within which the device is not
SUP_NON_OP
destroyed; no guarantee of correct operation
c
Param 57 I 75 — 300 mA current limitation for driver dominant state
BUS_LIM
d
driver on V = V
BUS BAT_max
Param 58 I −2 — — mA input leakage current at the receiver
BUS_PAS_dom
including pull-up resistor as specified in
Table 16 Param 71 driver off V = 0 V
BUS
V = 24 V
BAT
Param 59 I — — 20 µA driver off
BUS_PAS_rec
8 V < V < 36 V
BAT
8 V < V < 36 V
BUS
V ≥ V
BUS BAT
a
V denotes the supply voltage at the connector of the control unit and may be different from the internal supply, V ,
BAT SUP
for electronic components (see 5.3.2).
b
V denotes the supply voltage at the transceiver inside the control unit and may be different from the external supply
SUP
V for control units (see 5.3.2).
BAT
c
I : current flowing into the node.
BUS
d
A transceiver shall be capable to sink at least 75 mA. The maximum current flowing into the node shall not exceed
300 mA under DC conditions to avoid possible damage.
e
V : receive
...

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